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The logic AND gate of Fig. 2-46(a) is to be used to generate a crude pulse train by letting v1 10 sin !t V and v2 5 V. Determine (a) the amplitude and (b) the period of the pulse train appearing as vo . Ans: a 5 V; b 2 =! In the circuit of Fig. 2-29, vS is a 10-V square wave with a 4-ms period. The diode is nonideal, with the characteristic of Fig. 2-26(b). If the capacitor is initially uncharged, determine vC for the rst cycle of vs . Ans: 9:5 1 e 333:3t V for 0 t < 2 ms and 4.62 V for 2 t < 4 ms The forward voltage across the diode of Problem 2.35 is vD 0:3 0:060 cos t V. Find the ac component of the diode current id . Ans: 2:52 cos t mA The circuit of Fig. 2-47(a) is a voltage-doubler circuit, sometimes used as a low-level power supply when the load RL is reasonably constant. It is called a doubler because the steady-state peak value of vL is twice the peak value of the sinusoidal source voltage. Figure 2-47(b) is a sketch of the steady-state output voltage for vs 10 cos !t V. Assume ideal diodes, ! 120 rad/s, C1 20 F, C2 100 F, and RL 20 k . (a) Solve by SPICE methods for the decay time td . (b) From the SPICE results, determine the peak-topeak value of the ripple voltage. (Netlist code available from author website.) Ans: a 15:52 ms; (b) 0.75 V

Because the account shows only the total liability to all sellers, the need for a subsidiary record for each creditor in a separate ledger is apparent.

lim f (x ) = f (x)

D2 _ 0 (a)

Fig. 2-47

31.6 (Change of Variables) Consider a f (x) dx. Let x = g(u), where, as x varies from a to b, u increases or decreases from c to d. [See Fig. 31-1; in effect, we rule out g (u) = 0 in [c, d].] Show that

Find the diode current during one capacitor-charging cycle in the recti er circuit of Fig 2-15(a) if C 47 F; RL 1 k ; and vS 90 cos 2000t V (Hint: The approximate ripple formula cannot be used, as it implicitly assumes zero capacitor charging time Instead, solve for capacitor current and load current, and add) Ans: iD 8:49 sin 2000t 0:68 A for 2:966 ms t < 3:142 ms In the circuit of Fig 2-32, R1 RL 10 If the diode is ideal and vS 10 sin !t V, nd the average value of the load voltage vL Ans: 3:18 V Rework Problem 220 with the diode of Fig 2-18(b) reversed and all else unchanged (The circuit is now a positive clamping circuit.

) Ans: vo 10 sin !t V for 0 t < T=2, 0 for T=2 t < 3T=4, and 10 1 sin !t V for t ! 3T=4 Four diodes are utilized for the full-wave bridge of Fig 2-48 Assuming that the diodes are ideal and that vS Vm sin !t, (a) nd the output voltage vL and (b) nd the average value of vL Ans: a vL Vm j sin !tj V; b VL0 2Vm = A shunt lter capacitor (see Example 213) is added to the full-wave recti er of Problem 250 Show that the ripple factor is given by Fr 2= 4fRL C 1 % 1=2fRL C Add a 470 F lter capacitor across points a; b in the full-wave recti er circuit of Fig 2-48.

[The right-hand side is obtained by substituting g(u) for x, g (u) du for dx, and changing the limits of integration from a and b to c and d.]

If RL 1 k p and vS 120 2 sin 120 t V, use SPICE methods to determine (a) the magnitude (peak-to-peak) of the output ripple voltage and (b) the average value of output voltage (Netlist code available at author website) Ans: a vL 2:79 V; b VL0 168:34 V The level-discriminator circuit (Fig 2-49) has an output of zero, regardless of the polarity of the input signal, until the input reaches a threshold value Above the threshold value, the output duplicates the input Such a circuit can sometimes be used to eliminate the e ects of low-level noise at the expense of slight distortion Relate vo to vi for the circuit Ans: vo vi 1 A=jvi j for jvi j > A, and 0 for jvi j A.