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Once you know the four methods of depreciation, the next question is how to select the one that s most appropriate. Under generally accepted accounting principles (GAAP), businesses are encouraged to match the income an asset produces against its expense. This can be accomplished by selecting the correct depreciation method. Of the four depreciation methods discussed earlier, three are com pared in the table below. It is assumed that over a 5-year lifetime the as set was in operation for the following numbers of hours: 1,800, 1,200, 2,000, 1,400, 1,600. Cost of asset, $17,000; scrap value, $2,000.

Find vL for the full-wave recti er circuit of Fig. 2-43(a), treating the transformer and diodes as ideal. Assume RS 0.

RL _

_ + _

By the fundamental theorem,

n:1 4

_ iD2 (a)

31.3 Compute the mean value V of Theorem 31.3)

Based upon the above table, we can conclude the following: 1. If the asset is expected to generate income evenly over an extend ed period of time, the straight-line method should be used. 2. If the asset will produce a different number of units each year, or if the machine may wear out early, the units-of-production method is preferable because it is based upon the usage rather than time. 3. If the asset is expected to generate high income in its early years, the double-declining balance method should be used because it will gen erate greater depreciation expense in its earlier years, as it can be matched with the early period s higher revenues. Like the sum-of-the-years -digits, this accelerated depreciation method reduces tax liability in the early years, making more cash available for the asset s purchase.

Fig. 2-43 The two voltages labeled v2 in Fig. 2-43(a) are identical in magnitude and phase. The ideal transformer and the voltage source vS can therefore be replaced with two identical voltage sources, as in Fig. 2-43(b), without altering the electrical performance of the balance of the network. When vS =n is positive, D1 is forward-biased and conducts but D2 is reverse-biased and blocks. Conversely, when vS =n is negative, D2 conducts and D1 blocks. In short, 8 8 vS > vS =n vS ! 0 >0 >0 < < n n RL and iD2 iD1 vS =n vS vs > > :0 : 0 <0 RL n n jv =nj By KCL, iL iD1 iD2 S RL and so vL RL iL jvS =nj.

p For the full-wave recti er circuit of Fig. 2-43(a), let vS 120 2 sin 120 t V, RS 0:001 , RL 5 , and the ideal transformer has a turns ratio of 10:1. Using SPICE methods and assuming ideal diodes, plot the output voltage vL and diode currents iD1 and iD2 . Compare the results with predicted values based on the solution of Problem 2.28.

4 1 1 4 1/2 1 2 3/2 x x dx = x dx = 4 0 0 4 0 4 3 0 1 3/2 3/2 ) = 1 [( 4)3 0] = 1 (23 ) = 8 = 4 = (4 0 6 6 6 6 3

Prb2_29.CIR - FW rectifier vs 1 0 SIN( 0V {sqrt(2)*120V} 60Hz ) Rs 1 2 0.0010ohm * Ideal transformer, 10:1 ratio L1 2 0 1H IC=-0.39A L2 3 0 10mH L3 0 4 10mH kall L1 L2 L3 1 D1 3 5 DMOD D2 4 5 DMOD RL 5 0 5ohm .MODEL DMOD D(n=0.0001) ; Ideal diode .TRAN 1us 16.667ms 0s 1e-6s UIC .PROBE .END

Execution of <Prb2_29.CIR> and use of the Probe feature of PSpice result in the plots of Fig. 2-44 where the peak values of vL and iD1 have been marked.

CHAP. 31]

Fig. 2-44 Based on the results of Problem 2.28, the predicted peak values of vL and iD1 are given by iD1 max vL max p vS max =n 120 2=10 3:39 A RL 5 p v 120 2 S max 16:97 V n 10

CHAP. 2]

Summary

31.4 Prove the mean-value theorem for integrals (Theorem 31.3).

The Zener diode in the voltage-regulator circuit of Fig. 2-45 has a constant reverse breakdown voltage VZ 8:2 V, for 75 mA iZ 1 A. If RL 9 , size RS so that vL VZ is regulated to (maintained at) 8.2 V while Vb varies by 10 percent from its nominal value of 12 V.

iS RS + iZ + Vb _ + LZ _ iL + RL _