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For f (x) 0, the theorem is obvious: the area under the graph from a to b must be the sum of the areas from a to c and from c to b.

CHAP. 7]

But vgs vaa 0 , which can be substituted into (1) to give RTh vaa 0 r R ds D ia 1 1 2

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With vTh 0, insertion of RTh in place of the network to the right of a; a 0 in Fig. 7-13(a) leads directly to Fig. 7-13(b). (b) Applying KVL to the left of b; b 0 in Fig. 7-13(a) with b; b 0 open, while noting that vi vgs , yields vTh vi vgs 1 vi 3 Deactivating (shorting) vi , connecting a driving-point source vbb 0 to terminals b; b 0 to drive current ib into terminal b, noting that vgs ib RS , and applying KVL around the outer loop of Fig. 7-13(a) yield vbb 0 ib rds RS vgs ib rds 1 RS The Thevenin impedance follows from (4) as RTh vbb 0 rds 1 RS ib 5 4

EXAMPLE Theorem 30.4 yields a geometric interpretation for the de nite integral when the graph of f has the appearance

When the Thevenin source of (3) and impedance of (5) are used to replace the network to the left of b; b 0 , the circuit of Fig. 7-13(c) results.

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Suppose capacitor CS is removed from the circuit of Problem 7.4 (Fig. 7-5), and all else remains unchanged. Find (a) the voltage-gain ratio Av vL =vi ; b the current-gain ratio Ai iL =ii , and (c) the output impedance Ro looking to the left through the output port with RL removed.

An account has a debit balance when the sum of its debits exceeds the sum of its credits; it has a credit balance when the sum of the credits is the greater. In double-entry accounting, which is in almost universal

shown in Fig. 30-6. Here,

(a) The voltage-source small-signal equivalent circuit is given in Fig. 7-14 (the current-source model was utilized in Problem 7.4). Voltage division and KVL give vgs

RG _

= A1 A2 + A3 A4 + A5 That is, the de nite integral may be considered a total area, in which areas above the x-axis are counted as positive, and areas below the x-axis are counted as negative. Thus, we can infer from Fig. 27-2(b) that 2

+ LL _

Substituting (2) into (1) and solving for vgs yield vgs Now voltage division gives vL RD kRL vgs rds RS RD kRL 4 RG rds RS RD kRL vi RG ri rds 1 RS RD kRL 3

Fig. 30-6

and substitution of (3) into (4) and rearrangement give Av vL RG RD RL vi RG ri f RD RL rds 1 RS RD RL g 5

use, there are equal debit and credit entries for every transaction. Where only two accounts are affected, the debit and credit amounts are equal. If more than two accounts are affected, the total of the debit entries must equal the total of the credit entries.

With gm rds and the given values, (5) becomes Av 2 10 3 30 103 160 2 2 0:272 160 5 f 2 2 30 60 1 3 2 2 g

Arbitrary Limits of Integration In de ning a f (x) dx, we have assumed that the limits of integration a and b are such that a < b. Extend the de nition as follows:

(b) The current gain is found as Ai (c) iL vL =RL A R ri 0:272 160 5 v G 22:4 ii vi = RG ri RL 2

RL is disconnected, and a driving-point source is added such that vdp vL . With vi deactivated (shortcircuited), vgs 0 and Ro RD k rds RS RD rds RS 2 103 30 103 3 103 1:89 k RD rds RS 2 103 30 103 3 103

f (x) dx (with the de nite integral on the right falling under the original de nition).

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